1. Field of the Invention
The present invention relates to a CMOS image sensor, and more particularly, to a CMOS image sensor and a method for fabricating the same, to decrease a darkcurrent generated in the boundary between a diffusion area of a photodiode and a device isolation layer.
2. Discussion of the Related Art
Generally, an image sensor is a semiconductor device for converting an optical image into an electric signal. The image sensor can be broadly categorized into a charge coupled device (CCD) and a complementary metal oxide semiconductor (CMOS) image sensor.
The charge coupled device (CCD) includes a plurality of photodiodes (PD) aligned in a matrix-type configuration and converting light signals into electric signals, a plurality of vertical charge coupled devices (VCCD) formed between each vertical photodiode aligned in a matrix-type configuration and vertically transmitting electric charges generated from each photodiode, a horizontal charge coupled device (HCCD) for horizontally transmitting the electric charges transmitted by each of the vertical charge coupled devices (VCCD), and a sense amplifier (Sense Amp) for sensing and outputting the horizontally transmitted electric charges.
However, the charge coupled device (CCD) has disadvantages of a complicated driving method, high power consumption, and a complicated fabrication process requiring a multi-phased photo process. In the charge coupled device (CCD), a control circuit, a signal processing circuit, an analog to digital (A/D) converter circuit, and so on cannot be easily integrated into a charge coupled device chip, thereby having the problem of forming compact-size products.
Recently, the complementary metal oxide semiconductor (CMOS) image sensor has been considered to be the next generation image sensor that can resolve the problems and disadvantages of the charge coupled device (CCD). The CMOS image sensor is a device adopting a CMOS technology using the control circuit, the signal processing circuit, and so on as a peripheral circuit, so as to form MOS transistors in correspondence with the number of unit pixels on a semiconductor substrate, in order to sequentially detect the electric signals of each unit pixel by using a switching method, thereby representing an image.
Since the CMOS image sensor uses a CMOS fabrication technology, the CMOS image sensor is advantageous in that it has low power consumption and has a simple fabrication method through less photo process steps. In the CMOS image sensor, a control circuit, a signal processing circuit, an A/D converter circuit, and so on can be integrated into a CMOS image sensor chip, thereby enabling the product to be fabricated in a compact size. Accordingly, the CMOS image sensor is currently and extensively used in various applied technologies, such as digital still cameras and digital video cameras.
Meanwhile, the CMOS image sensor is categorized into a 3T-type, a 4T-type, and a 5T-type according to the number of transistors, wherein the 3T-type CMOS image sensor is comprised of one photodiode and three transistors, and the 4T-type CMOS image sensor is comprised of one photodiode and four transistors. A layout of a unit pixel in the 4T-type CMOS image sensor will be described as follows.
FIG. 1 is an equivalent circuit view of a 4T-type CMOS image sensor according to the related art. FIG. 2 is a layout of a unit pixel of a 4T-type CMOS image sensor according to the related art. FIG. 3 is a cross sectional view of a photodiode and a transfer gate along I–I′ of FIG. 2.
As shown in FIG. 1, the unit pixel 100 of the CMOS image sensor includes a photodiode 110 of a photoelectric conversion part, and four transistors. The four transistors are respectively formed of a transfer transistor 120, a reset transistor 130, a drive transistor 140, and a select transistor 150. Also, a load transistor 160 is electrically connected to an output terminal OUT of the unit pixel 100. At this time, non-explained reference FD is a floating diffusion area, Tx is a gate voltage of the transfer transistor 120, Rx is a gate voltage of the reset transistor 130, Dx is a gate voltage of the drive transistor 140, and Sx is a gate voltage of the select transistor 150.
In the unit pixel of the general 4T-type CMOS image sensor, as shown in FIG. 2, an active area 15 (heavy line) is defined, and a device isolation layer is formed in the portion except the active area 15. Then, one photodiode PD is formed in a large sized portion of the active area 15, and gate electrodes 123, 133, 143, 153 of the four transistors are formed to be overlapped with the remaining portion of the active area 15. That is, the transfer transistor 120 is formed by the gate electrode 123, the reset transistor 130 is formed by the gate electrode 133, the drive transistor 140 is formed by the gate electrode 143, and the select transistor 150 is formed by the gate electrode 153. Herein, impurity ions are implanted to the active area 15 of the respective transistors except the gate electrodes 123, 133, 143, 153, thereby forming source/drain regions S/D of the respective transistors.
Specifically, the photodiode and the transfer transistor of the aforementioned CMOS image sensor according to the related art will be described as follows.
Referring to FIG. 3, a P− type epitaxial layer 11 is formed on a P++ type semiconductor substrate 10. Then, as shown in FIG. 2, so as to define the active area 15, the device isolation layer 13 is formed on a device isolation area of the semiconductor substrate 10. After that, a gate insulating layer 121 and a gate 123 are formed on the epitaxial layer 11 for the transfer transistor 120, and sidewall insulating layers 125 are formed at both sidewalls of the gate 123. Also, an n− type diffusion area 131 and a P° type diffusion area 132 are formed in the epitaxial layer 11 of the photodiode PD. The P° type diffusion area 132 is formed on the n− type diffusion area 131. In addition, the source/drain regions S/D are formed of a highly doped n-type diffusion area N+ and a lightly doped n-type diffusion area n−.
However, the related art CMOS image sensor having the aforementioned structure has the problems of low device efficiency and low charge storing capacity due to the increase of a darkcurrent. That is, the darkcurrent is generated due to the electrons moving from the photodiode PD to a neighboring area in state of that the light is not incident on the photodiode PD. Generally, the darkcurrent is caused by various defects and dangling bond in the surface of the semiconductor substrate, in the boundary between the device isolation layer and the P° type diffusion area, in the boundary between the device isolation layer and the n− type diffusion area, in the boundary between the P° type diffusion area and the n− type diffusion area. Under the circumstance of low illumination, the darkcurrent may generate the serious problems such as low device efficiency and low charge storing capacity in the CMOS image sensor.
Accordingly, the P° type diffusion area is formed in the surface of the photodiode so as to decrease the darkcurrent, especially, the darkcurrent generated in a surface of a silicon substrate, in the related art CMOS image sensor.
However, the related art CMOS image sensor is much effected by the darkcurrent generated in the boundary between the device isolation layer 13 and the P° type diffusion area of the photodiode PD, and in the boundary between the device isolation layer 13 and the n− type diffusion area of the photodiode PD.
In more detail, as shown in FIG. 3, when forming a photoresist layer pattern (not shown), serving as an ion implantation mask layer for the n− type diffusion area 131 and the P° type diffusion area 132 of the photodiode PD, on the semiconductor substrate 10, the active area for the photodiode PD is exposed in an opening of the photoresist layer pattern. In this state, the impurity ions for the n− type diffusion area 131 and the P° type diffusion area 132 are implanted to the active area of the photodiode PD, the impurity ions for the n− type diffusion area 131 and the P° type diffusion area 132 are also implanted to the boundary between the active area of the photodiode PD and the device isolation layer 13.
Accordingly, the related art CMOS image sensor may have the damage due to the impurity implantation in the boundary between the n− type diffusion area and the P° type diffusion area and the device isolation layer, and furthermore, may have the defect. This defect causes the generation of electron and hole carrier, also, provides the recombination of the electron. As a result, a leakage current of the photodiode PD increases, whereby the darkcurrent of the CMOS image sensor increases.
As described above, the related art CMOS image sensor has the following disadvantages.
In the related art CMOS image sensor, when implanting the impurity ions to form the diffusion area of the photodiode PD, the impurity ions are implanted to the boundary between the device isolation layer and the active area of the photodiode PD. As a result, it is difficult to prevent the increase of the darkcurrent generated in the boundary between the device isolation layer and the active area for the photodiode PD, so that it has the limitation to the decrease of the darkcurrent.